1. Field of Invention
The present invention relates to a light emitting device array billboard and a control method thereof; particularly, it relates to such a light emitting device array billboard which can avoid ghost images and with low gray scale compensation, and a control method thereof.
2. Description of Related Art
FIG. 1A shows a schematic circuit diagram of a conventional light emitting diode (LED) array billboard 100. As shown in FIG. 1A, the LED array billboard 100 includes an LED array 110, plural line switch circuits 120, and plural channel switch circuits 130. The LED array 110 includes plural LEDs (LED1A˜LED4D), arranged by lines (line N−1˜line N+2) and channels (CH1˜CH4). The LED array billboard 100 operates by scanning line by line. In one frame, the LED array billboard 100 supplies a conduction voltage VDD to each line sequentially, and stops supplying the conduction voltage VDD before the next line is turned ON; on the other hand, the LED array billboard 100 electrically connects one or more selected channels to corresponding current sources at a proper timing, such that selected LEDs in the LED array 110 is turned ON, and thereby the LED array billboard 100 shows a desired pattern. For example, As shown in FIG. 1A, to turn ON the LED LED3B at line N and channel CH3, a line operation signal controls the line switch circuit 120 of the line N (referring to FIG. 1B) such that the switch S1 is ON and the switch S2 is OFF, to electrically connect the node NLN of the line N to the conduction voltage VDD; at the same time, a channel operation signal controls the channel switch circuit 130 of the channel CH3 (referring to FIG. 1C) such that the switch S3 is ON to electrically connect the node NC3 of the channel CH3 to the current source CS3 of the channel, whereby an LED current flows through the LED LED3B at line N and channel CH3 to turn ON the LED LED3B.
The LED array billboard 100 has a problem of “ghost image”, including upper and lower ghost image. Referring to FIG. 1D, a typical test is to sequentially turn ON the LEDs at a diagonal line (shown by the white circles) of the LED array 110 (shown by an array of circles), to check whether the LED array billboard 100 can operate normally. During this test, it is often found that the LEDs (shown by the gray circles) above the diagonal line weakly emit light. This phenomenon is called “the upper ghost image”. The reason to cause the upper ghost image is due to the parasitic capacitor CR in the line switch circuits 120. Referring to FIG. 1A, in the above-mentioned test, the line operation signal controls the line switch circuits 120 to sequentially electrically connect the node NLN−1 of the line N−1 and the node NLN of the line N to the conduction voltage VDD. Correspondingly, the channel operation signal controls the channel switch circuits 130 to sequentially electrically connect the node NC4 of the channel CH4 to the current source CS4 and the node NC3 of the channel CH3 to the current source CS3. The LED LED4A at line N−1 and channel CH4, and the LED LED3B at line N and channel CH3, are sequentially turned ON. However, after the node NLN−1 is disconnected from the conduction voltage VDD, there are charges still remaining in the parasitic capacitor CR of the line switch circuit 120, such that when the channel switch circuit 130 of the channel CH3 electrically connects the node NC3 to the current source CS3, the charges remaining in the parasitic capacitor CR in the line switch circuit 120 of the line N−1 discharge through the LED LED3A to the node NC3, and through the current source CS3 of the channel CH3 to ground. For this reason, the LED LED3A at line N−1 and channel CH3 is weakly turned ON to cause the upper ghost image as shown in FIG. 1D by the dashed circle.
Referring to FIGS. 2A and 2B, during the above-mentioned test, it is also often found that the LEDs (shown by the gray circles) below the diagonal line weakly emit light. This phenomenon is called “the lower ghost image”. The reason to cause the lower ghost image is due to the parasitic capacitor CC in the channel switch circuits 130. In the above-mentioned test, the line operation signal controls the line switch circuits 120 to sequentially electrically connect the node NLN of the line N and the node NLN+1 of the line N+1 to the conduction voltage VDD. Correspondingly, the channel operation signal controls the channel switch circuits 130 to sequentially electrically connect the node NC3 of the channel CH3 to the current source CS3 and the node NC2 of the channel CH2 to the current source CS2. The LED LED3B at line N and channel CH3, and the LED LED2C at line N+1 and channel CH2, are sequentially turned ON. However, after the channel switch circuit 130 of the channel CH3 stops electrically connecting the node NC3 to the current source CS3, because of the parasitic capacitor CC in the channel switch circuit 130, when the line operation signal electrically connects the node NLN+1 of the line N+1 to the conduction voltage VDD, a charging path is formed from the line switch circuits 120 through the node NLN+1 and the LED LED3C to the parasitic capacitor CC in the channel switch circuit 130, and during the charging process, the reverse end of the LED LED3C is not high enough to cause the LED LED3C non-conductive, so the voltage difference across the LED LED3C still turns ON the LED LED3C to cause the lower ghost image as shown in FIG. 2B by the dashed circle.
To explain the lower ghost image problem in more detail, please refer to FIGS. 2C-2G, which show the operations of the switches S1-S2 in the line switch circuits 120 of the lines N and N+1 and the switch S3 in the channel switch circuits 130 of the channels CH2 and CH3 when the LED LED3B and the LED LED2C are sequentially turned ON. FIG. 2H shows signal waveforms in the process from FIG. 2C to FIG. 2G.
Referring to FIG. 2C, first at stage A, the switch S1 in the line switch circuit 120 of the line N is ON and the switch S2 in the line switch circuit 120 of the line N is OFF, while the switch S1 in the line switch circuit 120 of the line N+1 is OFF and the switch S2 in the line switch circuit 120 of the line N is ON. The switch S3 in the channel switch circuit 130 of the channel CH3 is ON and the switch S3 in the channel switch circuit 130 of the channel CH2 is OFF. Therefore, as shown in FIG. 2H, at stage A, the voltage VN of the node NLN maintains at the conduction voltage VDD; the voltage VN+1 of the node NLN+1 maintains at 0V; the voltage VCH3 of the node NC3 maintains at a voltage which is equal to the conduction voltage VDD minus the forward bias voltage VDON of an LED; the voltage VCH2 of the node NC2 maintains at a non-conductive voltage VDOFF which is higher than the conduction voltage VDD minus the forward bias voltage VDON of an LED; the current ILED3B flowing through the LED LED3B is the current ILED controlled by the current source CS3; the current ILED2C flowing through the LED LED2C maintains at 0 A; and the current ILED3C flowing through the LED LED3C also maintains at 0 A.
Referring to FIG. 2D, at stage B, the switch S1 in the line switch circuit 120 of the line N is ON and the switch S2 in the line switch circuit 120 of the line N is OFF, while the switch S1 in the line switch circuit 120 of the line N+1 is OFF and the switch S2 in the line switch circuit 120 of the line N is ON. The switch S3 in the channel switch circuit 130 of the channel CH3 is turned OFF and the switch S3 in the channel switch circuit 130 of the channel CH2 is OFF. Therefore, as shown in FIG. 2H, at stage B, the voltage VN of the node NLN maintains at the conduction voltage VDD; the voltage VN+1 of the node NLN+1 maintains at 0V; the voltage VCH3 of the node NC3 increases from the voltage which is equal to the conduction voltage VDD minus the forward bias voltage VDON of an LED, and charges the parasitic capacitor CC; the voltage VCH2 of the node NC2 maintains at a non-conductive voltage VDOFF which is higher than the conduction voltage VDD minus the forward bias voltage VDON of an LED; the current ILED3B flowing through the LED LED3B becomes 0 A; the current ILED2C flowing through the LED LED2C maintains at 0 A; and the current ILED3C flowing through the LED LED3C also maintains at 0 A.
Referring to FIG. 2E, at stage C, the switch S1 in the line switch circuit 120 of the line N is turned OFF and the switch S2 in the line switch circuit 120 of the line N is turned ON, while the switch S1 in the line switch circuit 120 of the line N+1 is OFF and the switch S2 in the line switch circuit 120 of the line N is ON. The switch S3 in the channel switch circuit 130 of the channel CH3 is OFF and the switch S3 in the channel switch circuit 130 of the channel CH2 is OFF. Therefore, as shown in FIG. 2H, at stage C, the voltage VN of the node NLN becomes 0V; the voltage VN+1 of the node NLN+1 maintains at 0V; the voltage VCH3 of the node NC3 keeps increasing from the voltage which is equal to the conduction voltage VDD minus the forward bias voltage VDON of an LED, and continues charging the parasitic capacitor CC; the voltage VCH2 of the node NC2 maintains at a non-conductive voltage VDOFF which is higher than the conduction voltage VDD minus the forward bias voltage VDON of an LED; the current ILED3B flowing through the LED LED3B maintains at 0 A; the current ILED2C flowing through the LED LED2C maintains at 0 A; and the current ILED3C flowing through the LED LED3C also maintains at 0 A.
Referring to FIG. 2F, at stage D, the switch S1 in the line switch circuit 120 of the line N is OFF and the switch S2 in the line switch circuit 120 of the line N is ON, while the switch S1 in the line switch circuit 120 of the line N+1 is turned ON and the switch S2 in the line switch circuit 120 of the line N is turned OFF. The switch S3 in the channel switch circuit 130 of the channel CH3 is OFF and the switch S3 in the channel switch circuit 130 of the channel CH2 is OFF. Therefore, as shown in FIG. 2H, at stage D, the voltage VN of the node NLN maintains at 0V; the voltage VN+1 of the node NLN+1 changes from 0V to the conduction voltage VDD; the voltage VCH3 of the node NC3 keeps increasing from the voltage which is equal to the conduction voltage VDD minus the forward bias voltage VDON of an LED, and continues charging the parasitic capacitor CC; the voltage VCH2 of the node NC2 maintains at a non-conductive voltage VDOFF which is higher than the conduction voltage VDD minus the forward bias voltage VDON of an LED; the current ILED3B flowing through the LED LED3B maintains at 0 A; the current ILED2C flowing through the LED LED2C maintains at 0 A; however, the current ILED3C flowing through the LED LED3C is not zero current due to the lower ghost image problem. The voltage VN+1 is the conduction voltage VDD, but the voltage VCH3 has not yet reached a level sufficient to render the LED LED3C non-conductive. Hence, the LED LED3C is weakly turned ON to cause the lower ghost image.
Referring to FIG. 2G, at stage E, the switch S1 in the line switch circuit 120 of the line N is OFF and the switch S2 in the line switch circuit 120 of the line N is ON, while the switch S1 in the line switch circuit 120 of the line N+1 is ON and the switch S2 in the line switch circuit 120 of the line N is OFF. The switch S3 in the channel switch circuit 130 of the channel CH3 is OFF and the switch S3 in the channel switch circuit 130 of the channel CH2 is turned ON. Therefore, as shown in FIG. 2H, at stage E, the voltage VN of the node NLN maintains at 0V; the voltage VN+1 of the node NLN+1 maintains at the conduction voltage VDD; the voltage VCH3 of the node NC3 keeps increasing from the voltage which is equal to the conduction voltage VDD minus the forward bias voltage VDON of an LED, to the non-conductive level VDOFF; the voltage VCH2 of the node NC2 changes from the non-conductive voltage VDOFF to the voltage which is equal to the conduction voltage VDD minus the forward bias voltage VDON of an LED; the current ILED3B flowing through the LED LED3B maintains at 0 A; the current ILED2C flowing through the LED LED2C is the current ILED controlled by the current source CS2; the current ILED3C flowing through the LED LED3C becomes zero current because the voltage VCH3 has reached a level sufficient to render the LED LED3C non-conductive.
In view of the above drawback of the prior art, the present invention provides a light emitting device array billboard which can avoid ghost images and with low gray scale compensation, and a control method thereof.